---------------------------------------------------------------------------- The Florida SunFlash TI Announces Availability Of SuperSPARC SunFLASH Vol 41 #9 May 1992 ---------------------------------------------------------------------------- TEXAS INSTRUMENTS ANNOUNCES AVAILABILITY OF SuperSPARC(TM), INDUSTRY'S MOST HIGHLY INTEGRATED RISC MICROPROCESSOR HOUSTON (May 7, 1992) -- The industry's most highly integrated reduced instruction set computing (RISC) microprocessor is being produced by Texas Instruments, the company announced today. The superscalar microprocessor is designed to simplify the development of multiprocessing systems from high-volume desktop applications to powerful, massively parallel systems. Thousands of existing SPARC(TM) software applications are compatible with this single chip microprocessor. Co-developed with industry leading workstation manufacturer Sun Microsystems Computer Corporation, the 3.1 million transistor SuperSPARC microprocessor delivers peak performance of 150 million instructions per second (MIPS) at 50 MHz. Through on-chip support for MBus, an industry-standard module bus, up to four SuperSPARC microprocessors can be combined to deliver a peak performance of 600 MIPS. Up to 64 SuperSPARC microprocessors can be connected in parallel through XBus, a packet-switched extension bus. The key to SuperSPARC's usability in a wide range of system configurations is its high level of feature integration, including a superscalar "engine" that executes up to three instructions in each clock cycle. This "engine", combined with the largest on-chip caches available on any RISC processor today and an IEEE-compatible floating-point unit, provides high performance in a single chip. "SuperSPARC's superior ability to handle multiple instructions in a single clock cycle makes it a winner for high performance commercial multiprocessor systems," said Andrew Roberts, managing director, Mid Range Systems Division, ICL PLC. "Its high level of integration makes it an ideal general-purpose processor, suited for a wide range of applications ranging from technical workstations to large distributed transaction processing systems." SuperSPARC FIRST TO MAKE RISC MULTIPROCESSING EASY SuperSPARC is the first single-chip SPARC microprocessor to have complete built-in multiprocessing. SuperSPARC multiprocessing allows system vendors to expand from one to many microprocessors in the same system by using plug-compatible modules to scale performance. Computers from desktop workstations to massively parallel supercomputers can utilize differing quantities of the same modules to attain required performance. "With MBus SuperSPARC modules, users have an easy means of upgrading systems as the performance of microprocessors increases," said Dave Ditzel, director of advanced development at Sun Microsystems Laboratories Inc. "This saves existing investments in surrounding memory, disks, peripherals and software applications." System-ready modules from TI include a SuperSPARC MBus module running at 33 MHz and 40 MHz and a SuperSPARC MultiCache module running at 33 MHz, 40 MHz, 45 MHz and 50 Mhz. The SuperSPARC MultiCache module will include the SuperSPARC MultiCache Controller, an optional bus/cache controller and 1-MByte of expansion cache using industry 128K x 9 synchronous static random access memories (SRAMs). The SuperSPARC MultiCache module offers premium performance when used with the packet-switched XBus (extension bus) developed for large-scale multiprocessing by Xerox Palo Alto Research Center (PARC). Both MBus and XBus operate asynchronously from the SuperSPARC microprocessor, allowing CPU speed to scale independently from the bus speed. SPARC ARCHITECTURE COMPATIBILITY The SuperSPARC microprocessor is a fourth-generation, superscalar implementation of the SPARC architecture and is completely SPARC binary compatible, supporting thousands of existing SPARC applications. It complies with Version 8 of the SPARC Architecture, published by SPARC International, preserving end user investment in SPARC applications software. Due to the superscalar architecture, SuperSPARC-based systems will offer an immediate performance gain of up to three times conventional architectures for close to 5,000 applications spanning financial management, publications, engineering, manufacturing and business environments. Popular commercial titles include Lotus 1-2-3 and WordPerfect. IDC reports that the SPARC architecture is the most widely accepted RISC architecture, accounting for 63.1% of the RISC market in 1991. It is supported by more than 11 semiconductor companies, fifty plus systems companies and thousands of applications software and operating systems vendors, fostering an environment conducive to continued developments in microprocessors, software and systems. "SuperSPARC is yet another example of the scalability and flexibility of the SPARC architecture," said Bob Duncan, chairman of SPARC International. "It is an important milestone for an architecture that will continue to lead the industry through the next decade." SUPERSPARC DESIGNED FOR VOLUME SuperSPARC's superscalar architecture achieves high performance while avoiding complex systems engineering inherent with very high clock rates. Higher clock rates translate into the need for more specialized engineering and more expensive parts which can dramatically affect system vendors' ability to deliver volume. "The goal of our program was to achieve performance through superscalar parallelism and multiprocessing as opposed to depending on clock rates over 100 MHz, which make system design more difficult," said Steve Krueger, senior member technical staff at TI. "In balancing the needs of software applications and system design, we developed a superscalar, multiprocessing chip which lets the OEM and end-user pick the system performance needed, while allowing for easy upgradeability if performance needs increase." SuperSPARC AVAILABILITY TI is in volume production of SuperSPARC now and taking orders from key SPARC International Executive Members for 33 and 40 MHz configurations, with 45 and 50 MHz configurations to follow later this year. TI will begin accepting orders from non-executive members during the third quarter of 1992, with delivery in the fourth quarter. For system houses wanting to design SuperSPARC-based systems, a SuperSPARC System Design Starter Kit -- including advanced system development tools, documentation, technical support and several SuperSPARC units -- is available from TI at $50,000, with expected availability in the third quarter 1992. SuperSPARC, TMS390Z50, and the optional SuperSPARC MultiCache Controller, TMS390Z55, are fabricated using TI's EPICTM IIB 0.8-micron, triple-level metal BiCMOS process. This process provides the density and performance enablers that make a microprocessor with greater than three million transistors possible. 1988 COOPERATIVE AGREEMENT SET THE STAGE FOR SuperSPARC DEVELOPMENT The strategic relationship that developed SuperSPARC was established in late 1988, when TI and Sun signed a long-term cooperative development agreement to advance SPARC state-of-the art. The Sun/TI SuperSPARC team focused on leveraging Sun's sophisticated systems design and architecture expertise and TI's VLSI process technology and high-volume manufacturing capabilities. The SuperSPARC development team includes TI and Sun members at sites in Texas and California, working closely throughout all phases of the SuperSPARC program. Texas Instruments Incorporated, headquartered in Dallas, Texas, is a high-technology company with sales and manufacturing operations in more than 30 countries. TI develops, manufactures and markets semiconductors, defense electronics systems, software productivity tools, computer systems and peripheral products, custom engineering and manufacturing services, electrical controls, metallurgical materials, and consumer electronic products. Reader inquiries to: Texas Instruments Incorporated Semiconductor Group (SC-92033) P.O. Box 809066 Dallas, TX 75380-9066 1-800-336-5236, Ext. 3990 (U.S./Canada) 1-214-995-6611, Ext. 3990 (Outside U.S.) TRADEMARKS: Lotus and 1-2-3 are registered trademarks of Lotus Development Corporation. SuperSPARC and EPIC are trademarks of Texas Instruments Incorporated. SPARC is a trademark of SPARC International. WordPerfect is a registered trademark of the WordPerfect Corporation. ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ For information send mail to info-sunflash@sunvice.East.Sun.COM. Subscription requests should be sent to sunflash-request@sunvice.East.Sun.COM. Archives are on solar.nova.edu, paris.cs.miami.edu, uunet.uu.net, src.doc.ic.ac.uk and ftp.adelaide.edu.au All prices, availability, and other statements relating to Sun or third party products are valid in the U.S. only. Please contact your local Sales Representative for details of pricing and product availability in your region. Descriptions of, or references to products or publications within SunFlash does not imply an endorsement of that product or publication by Sun Microsystems. John McLaughlin, SunFlash editor, flash@sunvice.East.Sun.COM. (305) 776-7770.