SUNFLASH -------- Sunflash is an electronic mail news service from Sun Microsystems, Ft. Lauderdale, FL. Please address comments to John McLaughlin (sun!sunvice!johnj or johnmclaughlin@sun.COM). FOR Your Information -------------------- This is a new product announcement from a trade paper. Forwarding this new product announcement in no way implies an endorsement by Sun etc. etc. -johnj -------------------------------------------------------------------------------- Cypress CMOS SPARC revved up to 40 MHz San Jose, Calif.--Cypress Semiconductor Corp. has turned up the heat in CMOS SPARC implementations another notch by moving into production with integer units that have clock frequencies of 40 MHz. Furthermore, the company claims that the speed of the CY7C601IU is acutally usable within a system because the chip's internal bus operates at that clock rate with zero wait states. While Cypress's ability to quickly follow up the 33-MHz 601 with a higher-speed version is a milestone in it own right-showing that the company can provide a moving speed target at which both competing SPARC vendors and other RISC/CISC competitors must shoot--the real action at Cypress's high end will come in the fourth quarter. That's when it begins sampling the integrated CY7C604 cache controller and memory-management unit - a 40-MHz (worst-case) device seen as critical for providing the high cache hit rates needed in high-speed designs. Cypress claims a measured benchmark of 44,000 Dhrystones for the 40-MHz IU, using Dhrystone Rev. 2.1. The new unit is fully compatible with earlier 25-and 33-MHz versions and is software compatible with integer units produced by Fujitsu Microelectronics and LSI Logic Corp. Desktops to servers Steve Goldstein, director of marketing for Ross Technology Inc., said that if the success of Cypress's 33-MHz part--which has won orders from Solbourne Computers and Arix Corp. as well as Sun Microsystems, Inc. - is an indication, customer demand for the 40-MHz follow-on should come from low-cost desktop to multiprocessing server makers. (Ross is the Austin, Texas, subsidiary of Cypress formed by Motorola 88000 veteran Roger Ross to help Cypress develop new SPARC implementations.) "The interest is there in virtually all those segments," Goldstein said. He thinks the real goal for SPARC vendors in the next couple years will be to make the RISC architecture a viable alternative to Intel and Motorola architectures for desktop platforms priced at less than $5,000. Goldstein said that one of Cypress's targets in the next few months will be convincing mainstream U.S. PC vendors to add a SPARC-based line to their repertoire. The decision by such DOS application software houses as Lotus Development Corp. and WordPerfect Corp. to port applications to SunOS might encourage some potential customers in the next year, he said. The 207-lead C601 costs a hefty $895 in 100-piece quantities for the 40 MHz version, but Goldstein said that "you can be sure there are substantial price discounts for key customers needing high volumes." The new IU follows Sun's original architectural scheme for SPARC, with 136 32-bit registers arranged in register windows. The IU has two coprocessor interfaces: one for the CY7C602 floating-point unit and one for a custom coprocessor. Current drain for the 40-MHz part is listed at a maximum 650mA active, only 50mA above the 600-mA spec for both the 25- and 33-MHz parts. CY7C601 RISC performance 30| | XX | XX | XX | XX 25| XX | XX XX | XX XX MIPS | XX XX | XX XX 20| xx XX XX | xx XX XX | xx XX XX | xx XX XX | xx XX XX 15| XX XX XX | XX XX XX | XX XX XX | XX XX XX | XX XX XX 10| XX XX XX | XX XX XX | XX XX XX | XX XX XX | XX XX XX 5| XX XX XX | XX XX XX | XX XX XX | XX XX XX | XX XX XX +-------------------------------- Release Q3 Q1 Q3 88 89 89