Patch-ID# 116345-07 Keywords: cp2140 obp smc firmware ct410/810 ct400/800 Synopsis: Hardware/PROM: CP2140 SPARC and SMC firmware update Date: Nov/10/2004 Install Requirements: None Solaris Release: 8 SunOS Release: 5.8 Unbundled Product: Hardware/PROM Unbundled Release: SPARC 1.1.8 SMC 3.5.15 Xref: Topic: Relevant Architectures: sparc BugId's fixed with this patch: 5041492 5050522 5056728 Changes incorporated in this version: 5050522 5041492 5056728 Patches accumulated and obsoleted by this patch: 113814-01 Patches which conflict with this patch: Patches required with this patch: Obsoleted by: Files included with this patch: .FWupdate.info .diPatch FWBin/CP2140.SMC.3.5.15 FWBin/CP2140.SMC.BOOT.3F9.bin FWBin/CP2140.SPARC.1.1.8 FWBin/CP2140.SPARC.1.1.8_SMC.3.5.15 FWBin/CP2140.SPARC.1.1.8_SMC.3.5.15.README FWupdate MemSpeedUpdt README.116345-07 copyright Problem Description: 5050522 - LU requires Memory bus speed increase on Othello+ 5041492 - LU 10742: SCPU sits with Watchdog Timer Warning Cleared after power-cycle 5056728 - Starcat SC post (SSCPOST) fails with Makaha RRL6.2 Firmware Release Patch Installation Instructions: -------------------------------- 1. Install from OS level: ------------------------- This patch has following files: FWupdate FWBin/CP2140.SPARC.1.1.8_SMC.3.5.15.README FWBin/CP2140.SPARC.1.1.8_SMC.3.5.15 FWBin/CP2140.SPARC.1.1.8 FWBin/CP2140.SMC.3.5.15 FWBin/CP2140.SMC.BOOT.3F9.bin copyright .FWupdate.info .diPatch It has the supporting tool for updating the SPARC and/or SMC firmwares. Tool Name : FWupdate Purpose : To initiate system firmware update (SPARCFW & SMCFW) at Solaris level. User : Must be Super User to execute this script Usage : FWupdate [-h] FWupdate [-F] -f -d -t -h : Help, show usage -F : To Force the update when the Firmware is being downgraded -f : Complete filepath & filename specified by following argument -t : Type of Firmware binary. Possible options={sparc, smc, sparc+smc} -d : Complete path of device node or device alias specifying the device where file is located If disk is specified, the file must be in the root directory. Also, the file cannot of a Symbolic link Points of interest: 1) The complete filepath & filename must be specified using -f option. 2) Use -d option to specify the device from which the file may be loaded. User may specify the device either using a OBP device alias or using the complete path to the device node. 3) If the file is located on a local disk then it must be in the root directory and must not be a symbolic link. 4) The tool performs a check on the version of SPARC Firmware. If a downgrade is detected then the script would notify the user. A downgrade can only be updated using the force (-F) option. 5) Tool does not perform a check on SMCFW version. 6) Update script FWupdate and info file FWupdate.info must be in same directory. Sample usage: Example 1: FWupdate -f /CP2140.SPARC.1.1.8_SMC.3.5.15 -d net -t sparc+smc File is located on the NFS and is combined OBP & SMC image Example 2: FWupdate -f /CP2140.SPARC.1.1.8_smc.5.14 -d disk -t sparc+smc File is on a local disk in root directory Example 3: FWupdate -f /CP2140.SMC.3.5.15 -d disk -t smc File is SMC flash binary located on local disk 2. Install image from OBP 'ok' prompt: -------------------------------------- The images for flash-update CP2140.SPARC.1.1.8_SMC.3.5.15 - Combined Sparc and SMC image CP2140.SPARC.1.1.8 - Sparc image CP2140.SMC.3.5.15 - SMC image CP2140.SMC.BOOT.3F9.bin - SMC boot image o From OS, do 'halt' and system will go to OBP 'ok' prompt. o Disable auto boot, if it is set to true. ok setenv auto-boot? false o Before flash-update the image, do 'reset-all' to reset the board. o Update image: * Update Combined Sparc and SMC image ok flash-update /CP2140.SPARC.1.1.8_SMC.3.5.15 * Update Sparc image ok flash-update /CP2140.SPARC.1.1.8 * Update SMC image ok smc-flash-update /CP2140.SMC.3.5.15 * If the SMC boot image lost, it needs to do: ok smc-flash-update /CP2140.SMC.BOOT.3F9.bin o After update Sparc only image, do 'reset-all' to reset the CP2140 board. Notice: After flash-update a combined image or a smc-flash-update SMC image, the CP2140 board will take a hardware reset as soon as the update process is finished. o Set auto-boot? to true if it is needed. ok setenv auto-boot? true 3. Change memory speed ---------------------- There are two memory speed can set: High memory speed 108.00 MHz Low memory speed 092.57 MHz The ways to change memory speed: 1) Keyboard: CTRL-L - setting memory speed low. CTRL-H - setting memory speed high. When power on or reset of the board, hold the keys 'Control' and 'L' or 'H' down. Note: The window of O+ board to pick up the key entry is short. Keep the keys down when power on or reset the board. If turn on the diag-switch?, it is easer to pick up key entry. 2) OBP command: set-high-mem-speed - set memory to high speed set-high-mem-speed - set memory to high speed set-low-mem-speed - set memory to low speed read-mem-speed - read nvram memory speed setting .speed - check system speeds After run those command, reset the board. 3) Script: From os, run the script "MemSpeedUpdt" to set memory high and low. Reset the board to run the setting memory speed. Note: The Double-wide memory is not supported at high memory speed. If user inadvertantly sets high speed on a board with double-wide memory, it may hit a trap and not reach OBP 'ok' prompt. Use keyboard command to reduce memory speed to low in this instance. Special Install Instructions: --------------------------------------- None. README -- Last modified date: Wednesday, November 10, 2004