sunflash-Distributed to mailing list sunflash@suntri sunflash-Send requests and problem reports to owner-sunflash@suntri.east.sun.com ---------------------------------------------------------------------------- The Florida SunFlash SMCC UNVEILS SPARC(R) CPU ROADMAP SunFLASH Vol 51 #27 March 1993 ---------------------------------------------------------------------------- Contact: Carol Sacks, SMCC PR Phone: (415) 336-0521 Contact: Karen Simeone, Hi-Tech Communications, Inc. Phone: (415) 904-7000, ext. 225 MOUNTAIN VIEW, Calif. -- March 22, 1993 -- Sun Microsystems Computer Corporation (SMCC) today unveiled the industry's most comprehensive CPU design strategy based on the SPARC(R) microprocessor architecture. Called the SPARC CPU Roadmap, it provides details on nine CPU designs currently under development that are grouped into three microprocessor design families. Two of the families -- microSPARC(TM) and SuperSPARC(TM) -- have already resulted in CPU implementations shipping in volume from one of SMCC's microprocessor foundry partners, Texas Instruments. The third family, called UltraSPARC(TM), heralds SMCC's expansion into 64-bit SPARC implementations. Microprocessor products resulting from this strategy power current and future SMCC computer systems, providing scalability and binary compatibility across all product lines running the industry leading Solaris 2 distributed operating environment. As part of its SPARC Technology Business, SMCC is making resulting CPU designs and microprocessors available to the open market. "Unlike companies making only chips, SMCC -- as a system supplier -- really understands the most critical issues of those buying microprocessor-powered computers. Thus, all nine of these designs leverage our strengths in CPU logic design, computer system design, compiler development, operating system expertise and our knowledge of application software needs," said Derek Meyer, director of SPARC Marketing for SMCC. The microSPARC Design Family The microSPARC design family -- a "workstation on a chip" -- will meet CPU requirements for the low-cost desktop and server, portable and embedded markets. These requirements include high system-level integration on-chip, volume-oriented packaging, strong integer performance, low power consumption, and low cost. The microSPARC design family is composed of three design "points," called microSPARC, microSPARC II and microSPARC III. Each point will result in multiple CPU implementations. The microSPARC family is expected to deliver performance scaling to 150 Dhrystone MIPS and 100 SPECint 92. A new floating point unit, an enhanced integer unit, and power management features are design enhancements to microSPARC II, targeted for 1994. The microSPARC III designs, slated for 1995, will use faster transistors and add external cache memory. The single-scalar, single-pipeline microSPARC designs are 32-bit architectures based on Version 8 of the SPARC Architecture published by SPARC International, thus preserving end user investment in SPARC application software. MicroSPARC processors, manufactured by Texas Instruments, power Sun's recently announced SPARCclassic(TM) and SPARCstation LX(TM) workstations. The SuperSPARC Design Family Like microSPARC, the SuperSPARC family also includes three design points, called SuperSPARC, SuperSPARC+ and SuperSPARC II. They are 32-bit Version 8 designs optimized for high-volume multiprocessing, high performance per clock cycle (SPECint/MHz) and an integer/floating point balance for outstanding application performance. Resulting CPU implementations will include versions beyond 100 SPECint 92 and approaching 200 SPECfp 92. SuperSPARC+ designs, available later this year, will incorporate faster transistors. SuperSPARC II designs, slated for 1994, will incorporate enhanced integer and new floating point units, plus a dual-launch floating point, increasing overall floating point performance. SuperSPARC's integrated multiprocessing features, and MBus or XDBus(TM) upgradeability, currently support a wide range of desktop and server products. SuperSPARC microprocessors, manufactured by Texas Instruments, serve as the CPU architecture for SMCC's SPARCstation(TM) 10 workstation and server product lines, as well as the company's recently introduced SPARCcenter(TM) 2000 server, which offers up to 20-way multiprocessing. These systems also run the Solaris 2 operating environment. The UltraSPARC Design Family The UltraSPARC design family is SMCC's next-generation 64-bit SPARC technology, based on the Version 9 architecture specification from SPARC International. The Version 9 architecture supports upward compatibility with all current 32-bit SPARC applications. Resulting CPU implementations will power future Sun(TM) workstations and servers. UltraSPARC microprocessors are four-scalar, four-level metal designs, featuring dual-launch floating point units and providing both uni- and multiprocessor support. The family features three design points, UltraSPARC I, UltraSPARC II and UltraSPARC III. Each will include multiple CPU implementations. UltraSPARC I and II will utilize .5 micron CMOS processes, while UltraSPARC III uses advanced .5 to .4 micron BiCMOS process technology. This family will ultimately scale in performance, ranging from 700 to 1000 SPECint 92/SPECfp 92 and beyond. CPU implementations based on these designs are expected to arrive between 1995 and 1997. "The SPARC Architecture is an industry standard technology," said Meyer. "This roadmap outlines unsurpassed scalability and will enable SPARC adopters to deliver the widest range of compatible client-server solutions". SPARC, The Leading RISC Architecture According to market research organization International Data Corporation (IDC), SPARC systems represent 56 percent of 1992 RISC workstation/workstation server shipments. Products based on SPARC technology are available from more than 34 system vendors and seven microprocessor/ chipset vendors. Sun Microsystems Computer Corporation (SMCC) a subsidiary of Sun Microsystems, Inc., is the world's leading supplier of open client-server computing solutions. SMCC has its headquarters in Mountain View, Calif. ### Sun, the Sun logo, Sun Microsystems, Sun Microsystems Computer Corporation, the Sun Microsystems Computer Corporation logo and Solaris are trademarks or registered trademarks of Sun Microsystems, Inc. All SPARC trademarks, including the SCD Compliant logo, are trademarks or registered trademarks of SPARC International, Inc. SPARCcenter, SPARCstation, microSPARC and UltraSPARC are licensed exclusively to Sun Microsystems, Inc. SuperSPARC is a trademark of SPARC International and is licensed to Texas Instruments, Inc. Products bearing SPARC trademarks are based on the architecture developed by Sun Microsystems, Inc. XDBus is a trademark of Xerox Corporation licensed to Sun Microsystems, Inc. All other product or service names mentioned herein are trademarks of their respective owners. ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ For information send mail to info-sunflash@Sun.COM. Subscription requests should be sent to sunflash-request@Sun.COM. Archives are on solar.nova.edu, ftp.uu.net, sunsite.unc.edu, src.doc.ic.ac.uk and ftp.adelaide.edu.au All prices, availability, and other statements relating to Sun or third party products are valid in the U.S. only. Please contact your local Sales Representative for details of pricing and product availability in your region. Descriptions of, or references to products or publications within SunFlash does not imply an endorsement of that product or publication by Sun Microsystems. John McLaughlin, SunFlash editor, flash@Sun.COM. +1 305 351 4909.